This invention pertains to data input/output by duplex processors and more particularly to simplex input/output terminal control by duplex processors.
Systems which require a high degree of reliability are often designed with a duplex processor pair and duplex bussing between the processors and the peripheral devices, such as input/output terminals. Duplication of I/O terminals is not practical, since it would be difficult for a system operator to enter the same data simultaneously on two different terminals. Therefore, some portions of reliable systems must be simplex, such as I/O terminals. An arrangement for connecting duplex processors to simplex I/O terminals is required.
Previous systems, such as processor controlled switching systems, use simplex I/O interface circuits. These interface circuits provide for connection to the simplex I/O devices and also to the duplex processor buses through dual ported circuitry. Signals from the processor or from an associated configuration control circuit are used to determine which bus copy will have access to the dual ported circuitry.
The draw back of such schemes is their complexity. Substantial configuration control circuitry is required. This circuitry along with the requisite software is often one of the most complex error prone circuits in a duplex system. In addition, a considerable amount of software must be dictated to control the configuration of the system's I/O terminals.